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计算机科学与技术学院
 
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安 虹


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安 虹

 

电 话:(0551)63603583、13500507406
E- Mail:han@ustc.edu.cn
实验室:安徽省合肥市黄山路中国科大西校区科技实验楼西楼1409室

 

主要研究方向

超大规模并行计算机系统结构,大数据并行存储与处理系统,面向认知问题的可重构计算、并行程序设计环境与工具,高性能计算。

 

 

安虹,女,1963年生,山东胶州人,教授,博士生导师,计算机科学与技术学院计算机系统结构研究室主任,计算机系统结构专业学位点负责人,学生竞赛实践创新教育委员会主任。1984年华东冶金学院本科毕业,获工业自动化专业工学学士学位。分别于1993年和2000年在中国科技大学计算机系获计算机专业工学硕士和博士学位。1992-1993年为浙江大学CAD&CG国家重点实验室客座研究人员,从事图形图像并行算法和体系结构方面的研究工作。1995-1996年为中国科学院计算技术研究所国家智能计算机研究开发中心客座研究人员,从事并行计算机体系结构和并行程序设计环境方面的研究工作。2001-2004年为中国科学院计算技术研究所计算机系统结构专业博士后,从事高性能微处理器体系结构方面的研究工作。先后主持过20多项国家级和省部级科研项目,在计算机体系结构和并行处理相关领域发表学术论文100余篇,获得专利授权和软件登记10余项,出版教材1部,译著1部。现为国际高性能计算咨询委员会委员、中国计算机学会体系结构专委会委员和高性能计算专委会常务委员、中国计算机学会高级会员、中国软件行业协会数学软件分会会员,IEEE/ACM会员、《计算机研究与发展》编委、以及20多个计算机体系结构相关国内和国际学术会议的程序委员会成员。

 

招生信息:

  要求学生对计算机系统结构和系统软件设计有浓厚的兴趣和做出一流工作的愿望;诚实守信、性格开朗、勤奋自律;良好的沟通交流能力和团队协作精神;计算机系统结构相关基础知识扎实,编程能力、英语交流能力较强。
 

科研工作:

  长期从事计算机系统结构和并行处理相关研究工作。在微处理器芯片研制方面,作为骨干研究人员参加了龙芯1号和龙芯2号的体系结构设计和性能分析工作,获得首届中国科学院杰出科技成就奖。在新型通用微处理芯片体系结构的前瞻性研究方面,提出了多核微处理器芯片体系结构SPoTM/LogSPoTM设计思想及其关键技术,通过硬件支持实现串行程序自动推测并行化和隐式同步执行;提出了众核微处理芯片体系结构DISC/PAS-TPA设计思想及其关键技术,以及基于FPGA实现的大规模片上并行结构硬件模拟与性能评估技术,通过可重构计算技术实现多型的微处理芯片,在单片上实现对多个指令集体系结构、多种程序执行模型的支持。在并行编程环境与工具的研究和开发方面,主持过曙光2000和曙光3000的并行程序设计环境和工具的开发工作,提出了并行程序设计环境DUET设计思想,主持完成了DUET的设计与开发工作,相关研究成果已应用于曙光和神威并行机;提出了基于硬件计数器的并行程序性能调优技术,为龙芯3号设计并实现了并行程序性能调优工具集,支持多核平台的上的并行程序设计。近年来作为项目负责人,在多项国家重大和重点科研项目的资助下,围绕多核和众核微处理器芯片体系结构关键技术,开展片上多处理器体系结构、并行计算机系统结构、并行程序设计环境与工具、大数据并行存储与处理、高性能计算等方向的研究。主持的相关国家级科研项目包括: 

( 1) 国家自然科学基金面上项目“可扩展多线程处理器中的资源共享技术”

( 2) 国家自然科学基金重点项目子课题“超并行计算机体系结构上的多核并行编程模型和环境研究”

( 3) 国家自然科学基金面上项目“众核处理器结构上的并行程序执行模型”

( 4) 国家973项目子课题“可重构片上并行体系结构”

( 5) 国家973项目子课题“面向高通量应用的高效能片上资源配置和管理机制”

( 6) 国家科技重大专项项目子课题“龙芯多核平台上的可视化并行程序性能调优技术与工具”

( 7) 国家科技重大专项项目子课题“超高性能万亿次CPU的运行时系统研究”

( 8) 国家863重大项目子课题“高效能千万亿次级系统上软硬件协同支持的程序并行化方法”

( 9) 国家863项目“软硬件协同支持的可扩展多核事务存储体系结构”

(10) 国家863项目子课题“并行程序性能优化技术与程序正确性验证方法”

(11) 国家重点研发计划课题“面向异构融合数据流加速器的运行时系统”

 

 

教学工作:

  提出创办了先进计算机系统“华夏班”,组织华夏班计算机系统结构教学体系和核心课程改革工作。新开设了《计算机系统概论》(本科生英才班)、《计算机系统原型设计》(本科生);《高性能处理器体系结构》(本硕)、《计算机系统性能评价与预测》(博士生)等一系列计算机系统结构相关课程,主持教育部-英特尔精品课程《高性能处理器体系结构》项目;主持研制了用于本科生和研究生计算机系统结构相关课程实验教学的OpenCPU项目,该项目得到了教务处、研究生院和安徽省教育厅教学研究项目的共同资助。2012年组建了中国科大超算鸿雁队,并担任主教练,先后组织了17支队伍参加了国内外高性能计算相关赛事SC-SCC,ISC-SCC,ASC,PAC,RMDA,均获得优异成绩。在SC16大会上举办的大学生超算竞赛中,中国科学技术大学代表队包揽了总分和最高LINPACK性能两项冠军,成为SC大学生超算竞赛自2007年举办十年以来首个双料冠军队。在本人指导学习的本科英才班学生中,5名学生王元戎(2013届)、兰武伟(2014届)、贺松涛(2015届)、张智帅(2016届)、阮震元(2017届)获得了中国科大优秀毕业生最高荣誉奖郭沫若奖学金。

 

获 奖 情 况

   
  • 中科院科技进步二等奖(2000年)
  • 国家科技进步二等奖(2001年)
  • 国家级教学成果二等奖(2001年)
  • 安徽省教学成果一等奖(2001年)
  • 中国科学院杰出科技成就奖(2004年)
  • 中国科学院朱李月华优秀教师奖(2008年)
  • 宝钢优秀教师奖(2008年)
  • 中国科大平凡基金教育奖(2013年)
  • 宝钢优秀教师奖(2015年)
  • 西区精神教学成就奖(2016年)

 

主 要 论 著

   

教材著作: 
[01] 陈国良,安虹,陈崚,郑启龙,单久龙,并行算法实践,高等教育出版社,2004。
[02] 安虹,张昱,吴俊敏译,虚拟机——系统与进程的通用平台,机械工业出版社,2009。

 

近期发表论文: 

[01] Weihao Liang, Hong An, Feng Li, and Yichao Cheng,Optimization of Binomial Option Pricing on Intel MIC Heterogeneous System,Proceedings of 15th International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP 2015), LNCS v9528, Zhangjiajie, China,Nov.18-20, 2015, p17-29
[02] Junrui Zhou, Hong An, Yunyun Wang, and Junshi Chen,Local State Reusing for Efficient Model Checking of Multithreaded Programs,Proceedings of 15th International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP 2015), LNCS v9528, Zhangjiajie, China,Nov.18-20, 2015,p521-538
[03]  Yaobin Wang, Hong An, Zhiqin Liu, Lei Zhang, Qingfeng Wang, Parallelizing Block Cryptography Algorithms on Speculative Multicores. Proceedings of 15th International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP 2015), LNCS v9528, Zhangjiajie, China,Nov.18-20, 2015, p3-15
[04] Feng Li, Hong An, Weihao Liang,A Compiler translate Directive-based Language to Optimized CUDA,Proceedings of 16th IEEE International Conference on High Performance and Communications (HPCC), Paris, France, August 20-22, 2014,982-989
[05] Yichao Cheng, Hong An, Zhitao Chen, Feng Li,Understanding the SIMD Efficiency of Graph Traversal on GPU,Proceedings of 14th International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP 2014), 8630 LNCS PART 1,pp 42-56, DaLian, China, August 24-27, 2014
[06] Wang, Tao; An, Hong; Sun, Tao; Gao, Xiao-Chuan; Zhang, Hai-Bo; Cheng, Yi-Chao; Peng, Yi, Fair scheduling on dynamic heterogeneous chip multiprocessor, Journal of Software, Vol.25, No.1, p 80-89, December, 2014
[07] Gongming Li, Hong An, Qi Li, Bobin Deng,Wenbo Dai, Efficient Execution of Speculative Threads and Transactions with Hardware Transactional Memory, Journal of Future Generation Computer System (FGCS), Elsevier Press, v 30, n 1, p 242-253, 2014
[08] Xulong Tang, Hong An, Gongjin Sun, Dongrui Fan,VC-Bench: A Video Coding Benchmark Suite for Evaluation of Processor Capability,Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing Studies in Computational Intelligence,Springer, Volume 492, 2013, pp 101-116
[09] Zhang, Haibo; Han, Wenting; Li, Feng; He, Songtao; Cheng, Yichao; An, Hong; Chen, Zhitao,A criticality-aware DVFS runtime utility for optimizing power efficiency of multithreaded applications, Proceedings of the International Parallel and Distributed Processing Symposium, IPDPS, Phoenix, AZ, p 841-848, November 27, 2014
[10] Gongming Li,Hong An, Qi Li,Bobin Deng,Wenbo Dai, Efficient Execution of Speculative Threads and Transactions with Hardware Transactional Memory, Journal of Future Generation Computer System (FGCS), Elsevier Press, June 2013
[11]  Gongming Li, Hong An: Phase-Priority based Directory Coherence for Multicore Processor, International Journal of Computer Science, Engineering and Information Technology. CoRR abs/1305-3038 (2013)
[12] Xulong Tang, Hong An, Gongjin Sun, Dongrui Fan,VC-Bench: A Video Coding Benchmark Suite for Evaluation of Processor Capability,Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing Studies in Computational Intelligence,Volume 492, 2013, pp 101-116
[13] Gongming Li,Hong An, Qi Li, Bobin Deng,Wenbo Dai, SeTM: Efficient Execution of Speculative Threads with Hardware Transactional Memory,In: Proceedings of the 18th IEEE International Conference on Parallel and Distributed Systems (ICPDS'12), Singapore, December 17 - 19, 2012
[14] Qi Li, Hong An, Wenbo Dai, Gongming Li, Bobin Deng, Yu Liu, Xiaomei Li and Shilei Wu, Priority-based Squash Reducing Methods in Thread Level Speculation, International Journal of Information Technology, Communications and Convergence (IJITCC). Volume 2, Number 2/2012,pp138-154, August 13, 2012
[15] Li, Xiaoqiang,  Han, Wenting; Liu, Gu; An, Hong; Xu, Mu; Zhou, Wei; Li, Qi, A speculative HMMER search implementation on GPU In: Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops( IPDPSW 2012), p 735-741,May 21, 2012 - May 25, 2012
[16] Liu, Yu; An, Hong; Li, Xiaomei; Leng, Peng; Sun, Sun; Chen, Junshi, VSCP: A cache controlling method for improving single thread performance in multicore system,In: Proceedings of the 14th IEEE International Conference on High Performance Computing and Communications, HPCC-2012,Liverpool, UK , ICESS-2012, p 161-168, Jun25-27, 2012
[17] Sun, Tao; An, Hong; Wang, Tao; Zhang, Haibo; Sui, Xiufeng, CRQ-based fair scheduling on composable multicore architectures,In: Proceedings of the 26th ACM SIGARCH International Conference on Supercomputing(ICS’12) , p 173-183, Venice, Italy,Jun25-29. 2012
[18] Mao, Mengjie; An, Hong; Deng, Bobin; Sun, Tao; Wei, Xuechao; Zhou, Wei; Han, Wenting, Distributed replay protocol for distributed uniprocessors, In: Proceedings of the 26th ACM SIGARCH International Conference on Supercomputing(ICS’12) , p 3-13, Venice, Italy,Jun25-29. 2012
[19] Deng, Bobin; An, Hong; Li, Qi; Li, Gongming; Mao, Mengjie, Value predicted LogSPoTM: Improve the parallesim of thread level system by using a value predictor, In Proceeding of 11th IEEE/ACIS International Conference on Computer and Information Science(ICIS'12), p 130-135, Shanghai, China,May 30-June 1,2012
[20] Mao, Mengjie; An, Hong; Sun, Tao; Li, Qi; Deng, Bobin; Wei, Xuechao; Zhou, Junrui, Distributed control independence for composable multi-processors, In: Proceedings of the 2012 IEEE/ACIS 11th International Conference on Computer and Information Science(ICIS'12), p 124-129, Shanghai, China,May 30-June 1,2012
[21] Gu Liu,Hong An,Wenting Han, Xiaoqiang Li,Tao Sun,Wei Zhou,Xuechao Wei,Xulong Tang, FlexBFS: A Parallelism-aware Implementation of Breadth-First Search on GPU, Poster in the proceedings of the 17th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming(PPoPP'12), February 25-29, 2012, New Orleans, USA,pp279
[22] Tao Sun, Hong An, Tao Wang, Haibo Zhang, Gu Liu, and Mengjie Mao. CRQ-based Fair Scheduling on Composable Multicore Architectures.  In proceedings of The 7th International Workshop on Unique Chips and Systems (UCAS), held in conjunction with the IEEE 18th International Symposium on High Performance Computer Architecture (HPCA-18), New Orleans, USA, February 26, 2012
[23] Wei Zhou, Hong An, Hongping Yang, Gu Liu, Mu Xu and Xiaoqiang Li, Fast clustering of radar reflectivity data on GPUs,Proceedings of the sixth International Conference on Embedded and Multimedia Computing(EMC 2011), Enshi,China, August 11-13,2011
[24] Xiaoqiang Li, Hong An, Gu Liu, Wenting Han, Mu Xu, Wei Zhou, Qi Li,A Non-blocking Programming Framework for Pipeline Application on Multi-core Platform,In: Proceedings of the 9th IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA 2011), IEEE Computer Society Press, Busan, Korea, 26-28 May 2011
[25] Wenbo Dai, Hong An, Qi Li, Gongming Li, Bobin Deng, Shilei Wu, Xiaomei Li, Yu Liu, A Priority-aware NoC to Reduce Squashes in Thread Level Speculation for Chip Multiprocessors, In: Proceedings of the 9th IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA 2011), IEEE Computer Society Press, Busan, Korea, 26-28 May 2011
[26] Tao Sun, Hong An, Yongqing Ren, Mengjie Mao, Yang Liu, Mu Xu, Qi Li, FACRA: Flexible-core Architecture Chip Resource Abstractor,In:Proceedings of the 11th International Conference on Parallel and Distributed Computing, Applications and Technologies(PDCAT-10) , IEEE Computer Society Press, Wuhan, China, December 8-11, 2010
[27] Qian Zhang , Hong An, Gu Liu, Wenting Han , Ping Yao, Mu Xu, Xiaoqiang Li, The Optimization of Parallel Smith-Waterman Sequence Alignment Using On-chip Memory of GPGPU, In:Proceedings of the IEEE Fifth International Conference on Bio-Inspired Computing: Theories and Applications (BIC-TA 2010),IEEE Computer Society Press, Changsha,China,September23-26,2010
[28] Ping Yao, Hong An, Mu Xu, Gu Liu, Xiaoqiang Li, Yaobin Wang,Wengting Han, CuHMMer: A Load-Balanced CPU-GPU Cooperative Bioinformatics Application,In:Proceedings of the 2010 IEEE International Conference on High Performance Computing & Simulation (HPCS 2010),IEEE Computer Society Press, Caen, France, June 28 - July 2, 2010
[29] Yongqing Ren, Hong An, Ming Cong, Tao Sun, Yaobin Wang,Dynamic Resource Tuning for Flexible Core Chip Multiprocessors,In:Proceedings of  the 10th International Conference on Algorithms and Architectures for Parallel Processing(ICA3PP 2010), LNCS 6082,Springer,Busan, Korea, May21-23,2010. pp32-41
[30] CONG Ming, AN Hong, CAO Lu, LIU Yuan, LI Peng, WANG Tao, YU Zhi-hong, LIU Dong, Pattern-Unit based Regular Expression Matching with Reconfigurable Function Unit,In:Proceedings of The 2010 IEEE International Conference on Computational Science and Applications (ICCSA 2010),Lecture  Notes in Computer Science,Springer, Kyushu Sangyo University, Fukuoka, Japan,March 23-26, 2010
[31]  Gu Liu, Hong An, Wenting Han, Guang Xu, Ping Yao, Mu Xu, Xiurui Hao,A Program Behavior Study of Block Cryptography Algorithms on GPGPU,In:Proceedings of the 4th IEEE International Conference on Frontier of Computer Science and Technology(FCST 2009),Shanghai,China,December 17-19,2009
[32] Yaobin Wang, Hong An, Jie Yan, Qi Li, Wenting Han, Li Wang, Investigation of Factors Impacting Thread-level Parallelism from Desktop, Multimedia and HPC Applications, In:Proceedings of the 4th IEEE  International Conference on Frontier of Computer Science and Technology(FCST 2009),Shanghai,China,December 17-19,2009
[33]  Mu Xu, Hong An, Gu Liu, Yaobin Wang, Guang Xu, Ping Yao, Xiurui Hao, Wenting Han, The Mapping Framework and Optimizing Strategies for Block Cryptography Algorithms on Cell Broadband Engine,In:Proceedings of  the Tenth IEEE International Conference on Parallel and Distributed Computing, Applications and Technologies(PDCAT’09), IEEE Computer Society Press, Hiroshima, Japan, December 8-11, 2009
[34] Guang Xu, Hong An, Mu Xu, Gu Liu, Ping Yao, XiuRui Hao, XiaoQiang Li, Qian Zhang. Heterogeneous Explicit Data Graph Execution Architecture, Accepted by 1st Workshop on New Directions in Computer Architecture (NDCA), held in conjunction with the 42nd 2009 International Symposium on Microarchitecture (MICRO-42), New York, New York, December 13, 2009
[35] Guang Xu, Hong An, Gu Liu, Ping Yao, Mu Xu, Wenting Han, Xiaoqiang Li, Xiurui Hao,Performance and Power Efficiency Analysis of the Symmetric Cryptograph on Two Stream Processor Architectures,In:Proceedings of The Fifth IEEE International Conference on Intelligent Information Hiding and Multimedia Signal Processing, IEEE Computer Society Press, Kyoto, Japan, September 12 - 14, 2009
[36] Yongqing Ren, Hong An, Ming Cong, Guang Xu, Li Wang,Scaling the Performance of Tiled Processor Architectures with On-Chip Network Topology,In:Proceedings of the 2009 IEEE International Joint Conference on Computational Sciences and Optimization (IEEE CSO 2009),IEEE Computer Society Press, Sanya, Hainan Island, China, April 24-26, 2009.
[37] Ruiling Dou, Hong An, Rui Guo, Wenting Han, Ming Cong, Yongqing Ren, Localizing Loads Execution in a Data Cache Distributed Processor Architecture, In:Proceedings of the 2009 IACSIT Spring Conference(IACSIT SC2009),IEEE Computer Society Press, Singapore, April 17-20, 2009.
[38] Ming Cong, Hong An, Yongqing Ren, Canming Zhao, Jun Zhang,A feasibility study on hyperblock-based aggressive speculative execution model,In:Proceedings of the 2009 IEEE International Conference on Computer Engineering and Technology(ICCET 2009), IEEE Computer Society Press, Singapore, January 22 - 24, 2009.
[39] Rui Guo, Hong An, Ruiling Dou, Ming Cong, Yaobin Wang, Qi Li, LogSPoTM: a Scalable Thread Level Speculation Model Based on Transactional Memory,In: Proceedings of the thirteenth IEEE Asia-Pacific Computer Systems Architecture Conference (ACSAC 2008), IEEE Computer Society Press, Hsinchu,Taiwan, Aug.4-6, 2008.
[40] Li Wang, Hong An, Yongqing Ren,Yaobin Wang, Profile Guided Optimization for Dataflow Predication,In:Proceedings of the thirteenth IEEE Asia-Pacific Computer Systems Architecture Conference (ACSAC 2008), IEEE Computer Society Press, Hsinchu,Taiwan, Aug.4-6, 2008.
[41] Guang Xu, Hong An, Ming Cong , Fang Wang, Yongqing Ren, A Wire Delay Scalable Stream Processor Architecture,In:Proceedings of the thirteenth IEEE Asia-Pacific Computer Systems Architecture Conference (ACSAC 2008), IEEE Computer Society Press, Hsinchu,Taiwan, Aug.4-6, 2008.
[42] Yaobin Wang, Hong An, Bo Liang, Li Wang, Rui Guo, OpenPro : A Dynamic Profiling Tool Set for Exploring Thread-Level Speculation Parallelism, In:Proceedings of the 2008 IEEE International Conference on Computer and Electrical Enginerring (ICCEE 2008), Phuket Island, Thailand,December 20 - December 22, 2008 IEEE Computer Society Press,  Phuket, Thailand, December 20-22, 2008.

 

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