李 曦

电  话:(0551)63601556

E-Mail:llxx@ustc.edu.cn

个人主页:http://staff.ustc.edu.cn/~llxx   


主要研究方向:嵌入式实时系统、低功耗系统、智能计算机系统


李曦,博士,1963年8月生于北京,教授级高工,博导。本科毕业于成都气象学院,研究生毕业于中国科技大学计算机系,获计算机系统结构博士学位。长期主讲本科生《计算机组成原理》和研究生《嵌入式系统设计方法》等课程。在国内外核心学术期刊和高水平学术会议上发表SCI/EI检索论文40余篇,译著一部,参编一部。先后负责或参与国家自然基金、前沿创新计划和核高基等纵横向科研项目20余项,承担省部级教学研究课题多项。其研究小组在国内最早开展系统级低功耗优化理论和技术、ASIP体系结构设计与验证、操作系统模型、可重构计算、智能计算机系统结构等研究,持有相关技术专利多项,并与工业界建立了长期持久的合作关系。


获奖情况

  1. 唐立新教学名师奖,2018

  2. 安徽省教学成果,一等奖,2010,排名第一


代表性论著

  1. Bo Wan, Xi Li, Bo Zhang, Caixu Zhao, Xianglan Chen, Chao Wang, and Xuehai Zhou, DCW: A Reactive and Predictable Programming Framework for LET-based Distributed Real-time Systems,ACM TRANS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS,卷: 24期: 3,2019,SCI

  2. Chen Bo, Li Xi, Zhou Xuehai. Model Checking of MARTE/CCSL Time Behaviors Using Timed I/O Automata[J]. Journal of Systems Architecture, v88,p120-125,2018,SCI

  3. Gong L , Wang C , Li X , et al. MALOC: A Fully Pipelined FPGA Accelerator for Convolutional Neural Networks With All Layers Mapped on Chip[J]. IEEE Trans Comput Aided Des Integr Circuits Sys, 2018, 37(11):2601-2612,SCI

  4. Wan B , Li X , Luo H , et al. Work-in-Progress: TTI: A Timing ISA for LET Model in Safety-Critical Systems[C]. Proceedings - Real-Time Systems Symposium,v2018,p363-365,2017,SCI

  5. Wang C , Li X , Chen Y , et al. Service-Oriented Architecture on FPGA-Based MPSoC[J]. IEEE Transactions on Parallel and Distributed Systems, 2017, 28(10):2993-3006. SCI

  6. Wang C , Li X , Zhang H , et al. Hot spots profiling and dataflow analysis in custom dataflow computing SoftProcessors[J]. Journal of Systems & Software, 卷:125 期: 页:427-438,2016,SCI

  7. Sun B , Li X , Wan B , et al. Definitions of predictability for Cyber Physical Systems[J]. Journal of Systems Architecture, 2016, 63:48-60. SCI

  8. Zongwei Zhu, Xi Li, Chao Wang and Xuehai Zhou, “Memory Power Optimization on Different Memory Address Mapping Schemas”,,J. OF INFORMATION SCIENCE AND ENGINEERING,32,1-25,2016,SCI

  9. Guo Q , Li X , Wang C , et al. Evaluation and Tradeoffs for Out-of-Order Execution on Reconfigurable Heterogeneous MPSoC[J]. IEEE TRANS on VLSI SYSTEMS,24,79-91,2016,SCI